The present invention relates generally to a semiconductor device, such as a field-effect transistor (FET) suitable for production as a MOS thin-film transistor (MOS TFT). More particularly, the invention relates to a semiconductor device having a polycrystalline silicon layer acting as an active region with high effective mobility, relatively low threshold voltage, and low leakage current between the source region and the drain region when used in MOS TFT.
It has been known that semiconductor devices with polycrystalline silicon active regions formed by chemical vapor deposition processes and the like are less efficient than semiconductor devices with single-crystal silicon active regions due to relatively low effective mobility, relatively high threshold voltage, and relatively high leakage current while the MOS TFT is turned OFF. This is believed to be due to the characteristics of the polycrystalline silicon layer serving as the active region.
The inventors have found that the effective mobility .mu..sub.eff of the polycrystalline silicon film is significantly enhanced within a specific thickness range. Specifically, when the thickness of the polycrystalline silicon film is held to within a specific range thinner than that conventionally employed in semiconductor devices, its effective mobility becomes much higher than typically expected. This fact has not been exploited before because it has generally been believed that the effective mobility of a thin polysilicon film is almost independent of thickness in films thinner than 1500.ANG.. The results, of experiments by the inventor indicate that effective mobility becomes much greater than conventionally assumed in a range of thickness far thinner than is used conventionally.
The inventor has also found that if the effective mobility of the polycrystalline silicon film is sufficiently great, a thin film of polycrystalline silicon can be used to simplify the geometry and fabrication of complementary MOS (C-MOS) integrated circuits and so facilitate, for example, the fabrication of high-density C-MOS inverters.